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TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design

ACM Transactions on Reconfigurable Technology and Systems(2023)10.1145/3609335Source: DataRank Database

TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design is a research paper published in ACM Transactions on Reconfigurable Technology and Systems (2023). On theSindex it has a DataRank of 0. It has been cited 43 times.

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0DataRank · unranked

Scored on demand from live citation data

Open Access43 citations

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›Methodology & internals

datarank_citation_only_1hop_v6· scope data_onlyMethodology

Pipeline:MetadataData-paper checkEnrichmentCitation networkScoring

Enrichment:Funding (7 grants)Impact (FWCI 9.77)OA: hybridTopics (25)IDs (PubMed, OpenAlex)

FAIR Checklist

Context only (not used in score)

Findable (1/2)

Has DOI

Accessible (1/2)

Open Access

Interoperable (0/2)

Reusable (0/3)

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Authors (12)

Yuze Chi ORCID,Jason Lau ORCID,Linghao Song ORCID,Xingyu Tian ORCID,Moazin Khatti ORCID

Live enrichment

PubMed:26657633 OpenAlex:https://openalex.org/W4386830976

Intel/NSF CAPA program, the NSF NeuroNex Award

Grant: DBI-1707408

NIH

Grant: U01MH117079

NSERC Discovery

Grant: RGPIN-2019-04613 and DGECR-2019-00120

CFI John R. Evans Leaders Fund, NSF projects

Grant: 1937599 and 2211557

Natural Sciences and Engineering Research Council of Canada

Grant: unidentified

unidentified

National Science Foundation

Grant: 1707408

NeuroNex Technology Hub: Miniaturized open source devices for calcium imaging, electrophysiology, and real-time control of neural activity

National Institutes of Health

Grant: 5U01MH117079-05

Dendritome mapping of genetically-defined and sparsely-labeled cortical and striatal projection neurons

FWCI

9.77

Citation Percentile

1.0%

Citation Trend

2022

2023

2024

2025

2026

hybridLicense: cc-by

journalhttps://dl.acm.org/doi/pdf/10.1145/3609335

publisherhttps://dl.acm.org/doi/pdf/10.1145/3609335

publisherhttps://dl.acm.org/doi/10.1145/3609335

journalhttps://doi.org/10.1145/3609335

https://dx.doi.org/10.48550/arxiv.2209.02663

Fields of Study

Embedded Systems Design TechniquesParallel Computing and Optimization TechniquesInterconnection Networks and Systems0202 electrical engineering, electronic engineering, information engineering02 engineering and technology

Keywords

DataflowComputer scienceField-programmable gate arrayScalabilityTask (project management)Computer architectureFloorplanParallel computingEmbedded systemHigh-level synthesisOperating systemPerformance (cs.PF)FOS: Computer and information sciencesComputer Science - PerformanceComputer Science - Programming LanguagesComputer Science - Distributed, Parallel, and Cluster ComputingHardware Architecture (cs.AR)Distributed, Parallel, and Cluster Computing (cs.DC)Computer Science - Hardware ArchitectureProgramming Languages (cs.PL)